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  i ntegrated c ircuits d ivision www.ixysic.com ds-CPC3902-r03 1 CPC3902 250v n-channel depletion-mode fet part # description CPC3902ztr sot-223: tape and reel (1000/reel) CPC3902ctr sot-89: tape and reel (1000/reel) bv dsx / bv dgx r ds(on) (max) i dss (min) package 250v 2.5 ? 400ma sot-89, sot-223 applications features description ordering information circuit symbol ? current regulator ? normally-on switches ? solid state relays ? converters ? telecommunications ? power supply ? high breakdown voltage: 250v ? on-resistance: 2.5 ? max. at 25oc ? low v gs(off) voltage: -1.4 to -3.1v ? high input impedance ? small package sizes: sot-89, sot-223 d s g package pinout d g d s 4 123 the CPC3902 is a 250v, n-channel, depletion-mode, metal oxide semiconductor field effect transistor (mosfet) built upon a proprietary third generation vertical dmos process that realizes world-class, high voltage performance in an economical silicon gate process. this vertical dmos process yields a robust device with high input impedance for power applications. as with all mos devices, the fet structure prevents thermal runaway and thermal-induced secondary breakdown, which makes the CPC3902 ideal for use in high-power applications. the CPC3902 is a highly reliable fet device that has been used extensively in ixys integrated circuits division?s solid state relays for industrial and telecommunications applications. the CPC3902 is available in the sot-89 and the sot-223 package.
i ntegrated c ircuits d ivision www.ixysic.com 2 r03 CPC3902 absolute maximum ratings @ 25oc electrical characteristics @ 25oc (unless otherwise noted) parameter ratings units drain-to-source voltage 250 v gate-to-source voltage 15 v pulsed drain current 400 ma total package dissipation 1 1.8 w operational temperature -55 to +110 o c junction temperature, maximum +125 o c storage temperature -55 to +125 o c 1 mounted on 1"x1" 2 oz. copper fr4 board. parameter symbol conditions min typ max units drain-to-source breakdown voltage bv dsx v gs = -5.5v, i d =100a 250 - - v gate-to-source off voltage v gs(off) v ds = 15v, i d =1 ? a -1.4 - -3.1 v change in v gs(off) with temperature dv gs(off) /dt v ds = 15v, i d =1 ? a - - 4.5 mv/ o c gate body leakage current i gss v gs =15v, v ds =0v - - 100 na drain-to-source leakage current i d(off) v gs = -5.5v, v ds =250v - - 1 a saturated drain-to-source current i dss v gs = 0v, v ds =15v 400 - - ma static drain-to-source on-state resistance r ds(on) v gs = 0v, i d =300ma, v ds =10v - - 2.5 ? change in r ds(on) with temperature dr ds(on) /dt - - 2.5 %/ o c forward transconductance g fs i d = 200ma, v ds = 10v 400 - - m ? input capacitance c iss v gs = -3.5v v ds = 20v f= 1mhz - 230 -pf common source output capacitance c oss 16 reverse transfer capacitance c rss 9.5 source-drain diode voltage drop v sd v gs = -5v, i sd =150ma - 0.72 1 v absolute maximum ratings are stress ratings. stresses in excess of these ratings can cause permanent damage to the device. functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. typical values are characteristic of the device at +25c, and are the result of engineering evaluations. they are provided for information purposes only, and are not part of the manufacturing testing requirements. thermal characteristics device parameter symbol rating units CPC3902c (sot-89) junction to case ? jc 50 oc/w junction to ambient ? ja 90 CPC3902z (sot-223) junction to case ? jc 14 junction to ambient ? ja 55
i ntegrated c ircuits d ivision CPC3902 www.ixysic.com 3 r03 performance data @ 25oc (unless otherwise noted)* *the performance data shown in the graphs above is typical of device performance. for guaranteed parameters not indicated in t he written speci? cations, please contact our application department. v gs (v) -2.5 -2.0 -1.5 -1.0 -0.5 0.0 i d (ma) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 instantaneous transfer characteristics (v ds =10v) t a = 105oc t a = 25oc t a = -40oc temperature (oc) -50 -25 0 25 50 75 100 125 v gs (v) -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 threshold voltage (i ds =1 p a) i d (ma) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 g m (s) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 transconductance vs. drain current (v ds =10v) t a =-40oc t a =25oc t a =105oc voltage (v) 0.1 1 10 100 1000 current (a) 0.001 0.01 0.1 1 forward safe operating bias (v gs =0v, dc load) limited by channel saturation limited by device r on v ds (v) 0123456 i d (a) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 output characteristics v gs =0v v gs =-0.5v v gs =-1v v gs =-1.5v v gs =-2v temperature (oc) -50 -25 0 25 50 75 100 125 on-resistance ( : ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 on-resistance vs. temperature (v gs =0v, i d =300ma) v ds (v) 0 5 10 15 20 25 30 35 capacitance (pf) 0 50 100 150 200 250 300 350 400 capacitance vs. drain-source voltage (v gs =-3.5v) ciss coss crss i d (ma) 0.0 0.2 0.4 0.6 0.8 1.0 on-resistance ( : ) 0 1 2 3 4 5 on-resistance vs. drain current (v gs =0v) t a =105oc t a =25oc t a =-40oc temperature (oc) -50 -25 0 25 50 75 100 125 blocking voltage (v p ) 280 290 300 310 320 330 blocking voltage (v gs =-5v, i l =10 p a) temperature (oc) -50 -25 0 25 50 75 100 125 leakage current ( p a) 0.000 0.005 0.010 0.015 0.020 0.025 0.030 0.035 leakage current vs. temperature (v gs =-5v, v ds =250v)
i ntegrated c ircuits d ivision www.ixysic.com 4 r03 CPC3902 manufacturing information moisture sensitivity all plastic encapsulated semiconductor packages are susceptible to moisture ingression. ixys integrated circuits division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, ipc/jedec j-std-020 , in force at the time of product evaluation. we test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. this product carries a moisture sensitivity level (msl) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard ipc/jedec j-std-033 . device moisture sensitivity level (msl) rating CPC3902c, CPC3902z msl 1 esd sensitivity this product is esd sensitive , and should be handled according to the industry standard jesd-625 . soldering profile this product has a maximum body temperature and time rating as shown below. all other guidelines of j-std-020 must be observed. device maximum temperature x time maximum re ow cycles CPC3902c, CPC3902z 260oc for 30 seconds 3 board wash ixys integrated circuits division recommends the use of no-clean flux formulations. however, board washing to remove flux residue is acceptable, and the use of a short drying bake may be necessary. chlorine-based or fluorine-based solvents or fluxes should not be used. cleaning methods that employ ultrasonic energy should not be used.
i ntegrated c ircuits d ivision CPC3902 www.ixysic.com 5 r03 mechanical dimensions CPC3902z CPC3902ztr tape & reel dimensions mm min / mm max (inches min / inches max) 6.705 / 7.290 (0.264 / 0.287) 0.229 / 0.330 (0.009 / 0.013) 0.914 min (0.036 min) 1.90 (0.075) 1.90 (0.075) 6.10 (0.24) 2.286 (0.090) 0.90 (0.035) 3.20 (0.126) 6.30 / 6.71 (0.248 / 0.264) 2.286 (0.090) 3.30 / 3.71 (0.130 / 0.146) 2.90 / 3.10 (0.114 / 0.122) 0.610 / 0.787 (0.024 / 0.031) 0.020 / 0.102 (0.0008 / 0.004) 0.864 / 1.067 (0.034 / 0.042) 4.597 (0.181) 1.549 / 1.803 (0.061 / 0.071) 1.499 / 1.981 (0.059 / 0.078) pcb land pattern pin 1 dimensions mm (inches) embossment embossed carrier 177.8 dia (7.00 dia) top cover tape thickness 0.102 max (0.004 max) w=12.08 0.2 (0.476 0.008) b 0 =7.42 0.1 (0.292 0.004) a 0 =6.83 0.1 (0.269 0.004) p=8.03 0.1 (0.316 0.004) k 0 =1.88 0.1 (0.074 0.004) 2.00 0.05 (0.079 0.002) 4.00 0.1 (0.157 0.004) 1.75 0.1 (0.069 0.004) 5.50 0.05 (0.217 0.002)
i ntegrated c ircuits d ivision specification: ds-CPC3902-r03 ?copyright 2015, ixys integrated circuits division all rights reserved. printed in usa. 4/10/2015 for additional information please visit our website at: www.ixysic.com 6 CPC3902 ixys integrated circuits division makes no representations or warranties with respect to the accuracy or completeness of the co ntents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. neither circuit patent licenses nor indemnity a re expressed or implied. except as set forth in ixys integrated circuits division?s standard terms and conditions of sale, ixys integrated circuits division assumes no liability whatsoever, a nd disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infri ngement of any intellectual property right. the products described in this document are not designed, intended, authorized or warranted for use as components in systems in tended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of ixys integrated circuits division?s product may resul t in direct physical harm, injury, or death to a person or severe property or environmental damage. ixys integrated circuits division reserves the right to discontinue or make changes to its p roducts at any time without notice. CPC3902c CPC3902ctr tape & reel dimensions mm min / mm max (inches min / inches max) 2.286 / 2.591 (0.090 / 0.102) 3.937 / 4.242 (0.155 / 0.167) 1.397 / 1.600 (0.055 / 0.063) 0.356 / 0.432 (0.014 / 0.017) 1.626 / 1.829 (0.064 / 0.072) r 0.254 (r 0.010) 0.889 / 1.194 (0.035 / 0.047) 0.356 / 0.483 (0.014 / 0.019) 0.432 / 0.559 (0.017 / 0.022) 4.394 / 4.597 (0.173 / 0.181) 1.422 / 1.575 (0.056 / 0.062) 2.921 / 3.073 (0.115 / 0.121) 0.60 (0.024) typ 3 1.40 (0.055) 2.45 (0.096) 1.90 (0.075) 1.90 (0.074) 5.00 (0.197) 50o pcb land pattern pin 1 1.118 / 1.270 (0.044 / 0.050) 50o 0.432 / 0.508 (0.017 / 0.020) 0.864 / 1.016 (0.034 / 0.040) 2.845 / 2.997 (0.112 / 0.118) 45o dimensions mm (inches) embossment embossed carrier 177.8 dia (7.00 dia) top cover tape thickness 0.102 max (0.004 max) w=12.00 0.3 (0.472 0.012) b 0 =4.60 0.1 (0.181 0.004) a 0 =4.80 0.1 (0.189 0.004) p=8.00 0.1 (0.315 0.004) k 0 =1.80 0.1 (0.071 0.004) 2.00 0.05 (0.079 0.002) 4.00 0.1 (0.157 0.004) 1.75 0.1 (0.069 0.004) 5.50 0.05 (0.217 0.002)


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